The sample and hold circuit is a primary element in an analog to digital conversion system. The sample and hold circuit captures the analog value of an electrical quantity (e.g., a voltage, current, charge, etc.) and holds it constant in a memory element for a desired amount of time. Usually the memory element is a capacitor, which stores the captured analog value. Holding the value constant provides time for the supporting circuitry to digitize the analog value.
The sample and hold speed defines the portion of the analog input signal spectrum that can be converted without aliasing errors. Hence, high sampling speeds, combined with intrinsic analog bandwidth and linearity, are defining parameters of sample and hold circuits.
Moreover, the hold-time of the memory element in the sample and hold circuit is also important. The longer the hold-time, the more accurately the supporting circuitry can measure the respective value.
For example, U.S. Pat. No. 5,134,403 shows a current mode sampling circuit, which offers sub-optimal sampling speed.
What is, therefore, needed is a sampling device that provides a high sampling speed and a long hold-time.